// RCC  base address is 0x58024400
//  AHB4ENR register offset is 0xE0
.equ    RCC_AHB4ENR,  0x580244E0 // RCC AHB4 peripheral clock reg

// GPIOI base address is 0x58022000
.equ    GPIOI_BASE,  0x58022000 // GPIOI base address)

//  MODER register offset is 0x00
.equ    GPIOx_MODER,  0x00 // GPIOx port mode register
//  ODR  register offset is 0x14
.equ    GPIOx_ODR,    0x14 // GPIOx output data register
//  BSSR  register offset is 0x18
.equ    GPIOx_BSRR,    0x18 // GPIOx port set/reset register

// Values for BSRR register - pin 13: LED is on, when GPIO is off
.equ    LEDs_OFF,      0x00002000  // Setting pin to 1 -> LED is off
.equ    LEDs_ON,  0x20000000  // Setting pin to 0 -> LED is on


//--------------------------------------------------------------------------------------

main:
ldr r6, = RCC_AHB4ENR      // Load peripheral clock reg address to r6
ldr r5, [r6]                // Read its content to r5
orr r5, #0x00000100          // Set bit 8 to enable GPIOI clock
str r5, [r6]                // Store result in peripheral clock register

// Make GPIOI Pin13 as output pin (bits 27:26 in MODER register)
ldr r6, =GPIOI_BASE      // Load GPIOD BASE address to r6
ldr r5, [r6,#GPIOx_MODER]  // Read GPIOD_MODER content to r5
and r5, #0xF3FFFFFF          // Clear bits 27-26 for P13
orr r5, #0x04000000          // Write 01 to bits 27-26 for P13
str r5, [r6]                // Store result in GPIO MODER register

mov    r7, #LEDs_OFF
mov    r8, #LEDs_ON

str    r7, [r6,#GPIOx_BSRR] // Write to BSRR register
str    r8, [r6,#GPIOx_BSRR] // Write to BSRR register
str    r7, [r6,#GPIOx_BSRR] // Write to BSRR register

__end: b __end
Last modified: Friday, 1 December 2023, 11:24 PM